2025-05-30 14:53:24 +02:00

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EAPI=8
inherit git-r3
DESCRIPTION="framework for Verilog RTL synthesis"
HOMEPAGE="http://www.clifford.at/yosys/"
EGIT_REPO_URI=https://github.com/YosysHQ/yosys
EGIT_COMMIT=v$PV
LICENSE=ISC
SLOT=0
KEYWORDS=amd64
PATCHES=( $FILESDIR/$PN-makefile.patch )
DEPEND="dev-vcs/git
media-gfx/xdot
dev-libs/boost
llvm-core/clang"
src_compile()
{
emake DESTDIR="$D" PREFIX=/usr
}
src_install()
{
emake DESTDIR="$D" PREFIX=/usr install
}